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An SEM based system for a complete characterization of latch‐up in CMOS integrated circuits
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Zeitschriftentitel: | Scanning |
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Personen und Körperschaften: | , , , , , |
In: | Scanning, 8, 1986, 1, S. 20-33 |
Format: | E-Article |
Sprache: | Englisch |
veröffentlicht: |
Wiley
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Schlagwörter: |
Zusammenfassung: | <jats:title>Abstract</jats:title><jats:p>An electron beam testing system was established for a complete and detailed analysis of latch‐up in CMOS integrated circuits. Problems which can be studied include: <jats:list list-type="explicit-label"> <jats:list-item><jats:p>identification of latch‐up current paths in steady state condition;</jats:p></jats:list-item> <jats:list-item><jats:p>measurement of the local latch‐up sensitivity of the various parts of the circuit;</jats:p></jats:list-item> <jats:list-item><jats:p>observation of the time evolution of latch‐up from the firing event to the final condition.</jats:p></jats:list-item> </jats:list></jats:p> |
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Umfang: | 20-33 |
ISSN: |
0161-0457
1932-8745 |
DOI: | 10.1002/sca.4950080105 |